About the role
You find hardware mistakes before they become permanent, and you make the evidence for correctness matter as much as the architecture. In silicon the cost of being wrong is a respin, so the interesting question in this role is always what your testbench cannot see.
The work
Develop simulation, constrained-random tests, assertions and formal properties. Own coverage closure, reset and clock-domain checks, and adversarial tests of privileged interfaces. Connect each verification claim to the specification and document what has not been proven.
What good looks like
In your first 90 days after program activation, deliver a verification plan and regression environment that exposes seeded functional and security defects.
Evidence we look for
Bring experience with hardware verification, formal reasoning or rigorous pre-silicon validation. You should be able to explain vacuous proofs, coverage gaps and the limits of a testbench.
What we need to see
- Hardware verification, formal reasoning, or rigorous pre-silicon validation experience
- You can explain vacuous proofs, coverage gaps, and the limits of a testbench, from having hit them
- You quantify what has been proven rather than reporting that tests pass
- You push back on a design that cannot be verified
Nice to have
- Formal property verification specifically
- UVM or a comparable methodology at scale
- You have caught a bug that would have cost a respin
The exercise
Specify properties for a secure command interface and identify assumptions that could hide an access-control defect.
Where and how we work
In the office together five days a week, in any of these cities. Remote-friendly around your family, arranged one person at a time.