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H15 Β· Silicon and architecture

Physical Design and Timing Engineer

Make an approved chip design manufacturable and reliable at its intended operating limits. You will connect logical intent to physical implementation.

Custom silicon gateOffice-first9 cities

About the role

You make an approved design manufacturable and reliable at its intended operating limits, connecting logical intent to physical implementation. You are also the person who knows what a late architectural change really costs, and says so early enough to matter.

The work

Own floorplanning, placement, routing, clock trees, timing closure and power-integrity coordination. Work with foundry and implementation partners on design rules and signoff. Report performance, power and area together with corner assumptions and remaining risks.

What good looks like

In your first 90 days after program activation, deliver an implementation feasibility study and a credible closure plan for the selected block.

Evidence we look for

Bring hands-on physical design and static-timing analysis experience. Understand process-voltage-temperature corners, signal integrity and the cost of late architectural changes.

What we need to see

  • Hands-on physical design and static timing analysis
  • You work confidently across process, voltage and temperature corners
  • Signal integrity in practice rather than in principle
  • You can quantify the cost of a late change and make the case

Nice to have

  • Advanced-node experience
  • Power and clock distribution design
  • You have closed timing on a design that looked like it would not

The exercise

Explain a timing failure that cannot be solved by simply increasing cell size, and compare the available architectural fixes.

Where and how we work

In the office together five days a week, in any of these cities. Remote-friendly around your family, arranged one person at a time.